- Doctoral Degree
- Master's Degree
- Communication Skills
As a Device Engineer you will be responsible for design and development of active and passive components for Allegro BiCMOS and BCD technologies. As part of Wafer Technology RnD team, you will design active, passive, sensor, ESD devices to satisfy product design specifications. You will use TCAD device simulation, EDA tools, silicon experiments and electrical characterization. You will work with Allegro wafer fabrication partners to adopt existing and develop new process flows.
Your responsibilities will include
Design of active/passive/ESD/sensor devices for new process technologies.
Running TCAD simulations to design and optimize process flow, determine design rules and design of device structures to meet desired specifications
Definition of process and layout DOE and interface with process development team to execute fab experiments
Characterization of devices and test structures using bench measurements, semiconductor analyzers, TLP testers.
Working with EDA team to develop and maintain component libraries; define and maintain technology-specific design rules and guidelines.
Working with product designers to understand their component requirements and to provide guidance on implementation of devices for specific circuit designs. Perform design reviews.
Desired Skills and Experience
The successful candidate will have a minimum of MS in Electrical Engineering or Device Physics + 3 years of experience or a PhD in related fields. The individual will preferably have a 3 years of experience with process and device simulation tools from vendors such as Synopsis and Silvaco.
The candidate must also possess the following:
Solid understanding of semiconductor device physics.
Knowledge of circuit operation, circuit or device design experience is a plus.
Knowledge of wafer manufacturing process. Experience in process flow design is a plus.
Familiarity with Cadence EDA tools is a plus.
Excellent communication skills, ability to work individually and as part of a team.